SoC: Atmel AT91SAM9G45
All related documents for SoC:
http://www.atmel.com/devices/SAM9G45.aspx?tab=documents
Full manual:
http://www.atmel.com/Images/doc6438.pdf
ARM 926 EJS core describes what does ARM core actually do to memory.
http://www.atmel.com/Images/ARM_926EJS_TRM.pdf
For example, p.144:
All burst reads and writes are performed by the ARM926EJ-S processor as word-wide transfers (HSIZE[2:0] = 010). Single reads and writes are performed as byte (HSIZE[2:0] = 000), halfword (HSIZE[2:0] = 001), or word wide transfers (HSIZE[2:0] = 010).
Memory is Micron DDR2 MT47H32M16HR-25E IT (industrial version)
datasheet
Micron just random "how to perform well" manual:
Technical Note DDR2 (Point-to-Point) Features and Functionality
Atmel official recommendations for DDR2:
http://support.atmel.com/bin/customer.exe?=&action=viewKbEntry&id=900
Implementation of DDR2 on AT91SAM9G45 Devices (extract about features, configuration and initialization sequence).
Over-shoots occur when the current driven is too high. The SAM9G45 microprocessor embeds drive control on memory signals. Refer to the Product Datasheet for more details.
Hello,
ReplyDeleteDid you ever get this memory to function properly?
In the end, we've found out that the problem we have encountered was the incorrect CPU power supply. There was not enough current for 1.8V voltage (that is used with DDR2), so memory corruption occurred on intensive MMU memory operations.
DeleteThe problem was solved by soldering additional capacitors over 1.8V power supply line to filter out peak current consumption. Just plugged them one over another (in parallel) and it helped.
Still no idea why exactly one device did not require this modification.
With this capacitor(s), I did not have any memory problems so I did not investigate about half drive memory operation mode.
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